Methods and apparatus for twiddle factor generation for use with a programmable mixed-radix DFT/IDFT processor
AssigneeCavium, Inc.
InventorsYuanbin Guo, Hong Jik Kim
Life of this patent
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Abstract
Twiddle factor generation for use with a programmable mix-radix vector processor (“PVP”) capable of calculating discrete Fourier transform (“DFT/IDFT”) values. In an exemplary embodiment, an apparatus includes look-up table logic that receives twiddle control factors and outputs a selected twiddle factor scaler value (TFSV), a base vector generator that generates a base vector values based on the selected TFSV, and a twiddle column generator that generates a twiddle vector from the base vector.
Claims20
A device containing a programmable vector processor (PVP) able to process data for network communication, comprising:
- a state machine configured to generate twiddle factor control (TFC) signals, scaling control signals, and radix engine control signals;
- a twiddle factor generator coupled to the state machine and able to provide twiddle factor data in accordance with the TFC signals;
- a scaling unit coupled to the state machine and operable to scale pipeline vector data based on the scaling control signals;
- and
- a mixed radix engine coupled to the state machine and configured to generate a first radix result via radix factorization in response to the radix engine control signals.
A method of generating twiddle values for a programmable vector processor (PVP) for network communication, the method comprising:
- providing twiddle factor control (TFC) signals by a state machine to a twiddle factor generator for generating twiddle factor data;
- sending scaling control signals via the state machine to a scaling unit for scaling pipeline vector data;
- forwarding radix engine control signals from the state machine to a mixed radix engine for computing an intermediate radix result in response to the twiddle factor data and the pipeline vector data;
- and
- storing the intermediate radix result in a memory bank for next iteration for determining a discrete Fourier transform (DFT) result.
A method of generating twiddle values via multiple iterations in a programmable vector processor (PVP), the method comprising:
- forwarding vector data from a memory to a vector mixed-radix engine via a vector data-path pipeline;
- computing by the vector mixed-radix engine an intermediate radix result in accordance with the vector data;
- storing the intermediate radix result in the memory for next iteration;
- reconfiguring the vector mixed-radix engine based on a next radix factor;
- and
- outputting a final radix result by the vector mix-radix engine in response to the intermediate radix result retrieved from the memory passing through the vector data-path pipeline.
Dependencies are inferred from the claim text.