Defending against a side-channel information attack in a data storage device

A data storage device comprising:

• a main memory configured to store user data supplied by a host device;
• and
• a controller circuit comprising a programmable processor having associated programming in a memory configured to, responsive to receipt of a host command from the host device to direct a transfer of selected user data between the host device and the main memory, perform a cryptographic function involving multiple logical computations to arrive at an output value responsive to an input value over a time interval from receipt of the input value to generation of the output value, the input value forming a portion of the selected user data associated with the host command, the controller circuit further configured to, during the time interval, repetitively interrupt the programmable processor during the multiple logical computations by a plurality of interrupt calls respectively selected responsive to a first series of random numbers and resuming operation of the programmable processor to continue the multiple logical computations by a corresponding plurality of function return calls respectively selected responsive to a different, second series of random numbers, each of the plurality of interrupt calls causing the programmable processor to temporarily suspend the multiple logical computations and perform at least one non-cryptographic function unrelated to the cryptographic function, the programmable processor clocked at a constant, selected clock rate over an entirety of the time interval during execution of the cryptographic function and the non-cryptographic function.