Apparatus and method for an all-digital phase lock loop

An apparatus for wireless communication of a first wireless device that includes an all-digital phase lock loop (ADPLL), comprising:

• means for receiving an oscillator tuning word (otw) signal that is associated with low-path pass information and transmission data;
• means for applying a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator;
• and
• means for determining a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function;
• wherein the means for applying the cost function to the otw signal is configured to:
• remove a direct current (DC) portion of the otw signal to obtain an analog-current (AC) portion of the otw signal;
• determine a peak-to-average ratio (PAR) associated with the AC portion of the otw signal and an anti-PAR ratio associated with the AC portion of the otw signal;
• select a metric for use by the update function based at least in part on the PAR ratio and the anti-PAR ratio of the otw signal;
• determine a peak value associated with the otw signal or an anti-peak value associated with the otw signal;
• and
• send one or more of the metric, the PAR, the anti-PAR, the peak value, or the anti-peak value associated with the otw signal to the update function.

An apparatus for wireless communication of a first wireless device that includes an all-digital phase lock loop (ADPLL), comprising:

• receive an oscillator tuning word (otw) signal that is associated with low-path pass information and transmission data;
• apply a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator;
• and
• determine a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function,
• wherein the at least one processor is configured to apply the cost function to the otw signal by:
• removing a direct current (DC) portion of the otw signal to obtain an analog-current (AC) portion of the otw signal;
• determining a peak-to-average ratio (PAR) associated with the AC portion of the otw signal and an anti-PAR ratio associated with the AC portion of the otw signal;
• selecting a metric for use by the update function based at least in part on the PAR ratio and the anti-PAR ratio of the otw signal;
• determining a peak value associated with the otw signal or an anti-peak value associated with the otw signal;
• and
• sending one or more of the metric, the PAR, the anti-PAR, the peak value, or the anti-peak value associated with the otw signal to the update function.

A non-transitory computer-readable medium storing computer executable code of a first wireless device that includes an all-digital phase lock loop (ADPLL), comprising code to:

• receive an oscillator tuning word (otw) signal that is associated with low-path pass information and transmission data;
• apply a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator;
• and
• determine a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function,
• wherein the code to apply the cost function to the otw signal is configured to:
• remove a direct current (DC) portion of the otw signal to obtain an analog-current (AC) portion of the otw signal;
• determine a peak-to-average ratio (PAR) associated with the AC portion of the otw signal and an anti-PAR ratio associated with the AC portion of the otw signal;
• select a metric for use by the update function based at least in part on the PAR ratio and the anti-PAR ratio of the otw signal;
• determine a peak value associated with the otw signal or an anti-peak value associated with the otw signal;
• and
• send one or more of the metric, the PAR, the anti-PAR, the peak value, or the anti-peak value associated with the otw signal to the update function.