Interconnection network for integrated circuit

A computer-implemented method of generating an electronic design file representing a design of an interconnection network for providing data transfer between nodes of an integrated circuit;

• the method comprising:
• in response to design specification data identifying the nodes to be connected by the interconnection network, generating the electronic design file specifying that the interconnection network comprises:
• a plurality of endpoints each to exchange data with a respective node of the integrated circuit;
• a primary network to route a primary payload from a source endpoint to a destination endpoint;
• and
• a redundant network to route, to the destination endpoint, a redundant payload comprising a first check code calculated based on at least a portion of the primary payload, the first check code having fewer bits than said at least a portion of the primary payload;
• wherein the destination endpoint comprises error checking circuitry to perform an error checking operation to calculate a second check code based on the primary payload received via the primary network, compare the second check code with the first check code received via the redundant network, and signal an error when a mismatch is detected between the first check code and the second check code,
• wherein the redundant network comprises at least one intermediate component each configured to route the redundant payload from an upstream component to a downstream component;
• wherein at least for a synchronous intermediate component for which both the upstream component and the downstream component are configured to operate in response to synchronous clock signals, the synchronous intermediate component is configured to route the redundant payload from the upstream component to the downstream component independent of any comparison of the redundant payload with information derived from the primary payload transmitted on the primary network.