Processing device, network node, client device, and methods thereof
AssigneeHuawei Technologies Co., Ltd.
InventorsPeng Wang, Fredrik Berggren
Life of this patent
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Abstract
This disclosure relates to techniques for synchronization signals. The synchronization signal comprise a primary synchronization signal (PSS) generated based on a PSS sequence and a secondary synchronization signal (SSS) generated based on an SSS sequence. The SSS sequence may be generated based on a first sequence corresponding to a first cyclic shift and a second sequence corresponding to a second cyclic shift. The first cyclic shift and the second cyclic shift are associated with Cell ID. The PSS sequence may be generated based on one of the first and the second sequences.
Claims30
A network node, comprising:
- a transceiver;
- and
- a processing device coupled to the transceiver, the processing device being configured to generate a primary synchronization signal (PSS) sequence for a PSS and a secondary synchronization signal (SSS) sequence for an SSS,
- wherein the SSS sequence is associated with a first cyclic shift m0 and a second cyclic shift m1, and wherein m0 and m1 satisfy:
- m
- 0
- =
- g
- (
- N
- ID
- ,
- max
- (
- 2
- )
-
- ⌊
- N
- ID
- (
- 1
- )
- L
- ′
- ⌋
- +
- N
- ID
- (
- 2
- )
- )
- ;
- m
- 1
- =
- (
- N
- ID
- (
- 1
- )
-
- mod
-
- L
- ′
- )
- wherein:
- g is an integer equal to or larger than 1;
- L′ is 112;
- NID(1)∈{0, 1, 2, . . . , NID,max(1)−1};
- and
- NID(2)∈{0, 1, . . . , NID,max(2)−1};
- and
- the transceiver being configured to transmit the PSS based on the PSS sequence and the SSS based on the SSS sequence.
A processing device for wireless communications, comprising:
- at least one processor configured to:
- determine a first cyclic shift m0 and a second cyclic shift m1;
- and
- generate a secondary synchronization signal (SSS) sequence for an SSS,
- wherein the SSS sequence is associated with the first cyclic shift m0 and the second cyclic shift m1, and wherein m0 and m1 satisfy:
- m
- 0
- =
- g
- (
- N
- ID
- ,
- max
- (
- 2
- )
-
- ⌊
- N
- ID
- (
- 1
- )
- L
- ′
- ⌋
- +
- N
- ID
- (
- 2
- )
- )
- ;
- m
- 1
- =
- (
- N
- ID
- (
- 1
- )
-
- mod
-
- L
- ′
- )
- wherein:
- g is an integer equal to or larger than 1;
- L′ is 112;
- NID(1)∈{0, 1, 2, . . . , NID,max(1)−1};
- and
- NID(2)∈{0, 1, . . . , NID,max(2)−1}.
A non-transitory computer readable medium, comprising computer instructions that, when executed by a processor, cause the processor to
- determine a first cyclic shift m0 and a second cyclic shift m1;
- and
- generate a secondary synchronization signal (SSS) sequence for an SSS,
- wherein the SSS sequence is associated with the first cyclic shift m0 and the second cyclic shift m1, and wherein m0 and m1 satisfy:
- m
- 0
- =
- g
- (
- N
- ID
- ,
- max
- (
- 2
- )
-
- ⌊
- N
- ID
- (
- 1
- )
- L
- ′
- ⌋
- +
- N
- ID
- (
- 2
- )
- )
- ;
- m
- 1
- =
- (
- N
- ID
- (
- 1
- )
-
- mod
-
- L
- ′
- )
- wherein:
- g is an integer equal to or larger than 1;
- L′ is 112;
- NID(1)∈{0, 1, 2, . . . , NID,max(1)−1};
- and
- NID(2)∈{0, 1, . . . , NID,max(2)−1}.
Dependencies are inferred from the claim text.