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US 10,771,083 B2Granted
Top plate sampling analog-to-digital converter (ADC) having a dynamic comparator with a preamplifier and a clamp circuit
AssigneeTexas Instruments Incorporated
InventorJoseph Palackal Mathew
Life of this patent
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Abstract
A system includes analog-to-digital converter (ADC) logic, wherein the ADC logic includes a stage with a dynamic comparator circuit. The ADC logic also includes a residue stage. The dynamic comparator circuit includes a preamplifier and a common mode clamp circuit for the preamplifier.
Claims16
A system, comprising:
- analog-to-digital converter (ADC) logic having outputs, wherein the ADC logic comprises:
- a stage with a dynamic comparator circuit wherein the dynamic comparator circuit comprises:
- a preamplifier;
- and
- a common mode clamp circuit for the preamplifier;
- a residue stage having inputs wherein the inputes of the residue stage are coupled to the outputs of the ADC logic,
- wherein the dynamic comparator circuit is a differential comparator circuit, and the preamplifier is a differential preamplifier.
4 more elements
A system, comprising:
- analog-to-dial converter (ADC) logic, wherein the ADC logic comprises:
- a stage with a dynamic comparator circuit;
- and
- a residue stage, wherein the dynamic comparator circuit comprises:
- a preamplifier;
- and
- a common mode clamp circuit for the preamplifier;
- further comprising a top-plate sampling arrangement configured to provide input samples to the ADC logic;
- wherein the preamplifier comprises a pair of transistors, each transistor having a control terminal, a first current terminal, and a second current terminal, wherein each respective control terminal is coupled to a control signal node, wherein each respective first current terminal is coupled to a supply voltage node, and wherein each respective second current terminal is coupled to a respective differential output node.
6 more elements
A system, comprising:
- analog-to-digital converter (ADC) logic having inputs and outputs, wherein the ADC logic comprises:
- a stage with a dynamic comparator circuit wherein the dynamic comparator circuit comprises:
- a preamplifier;
- and
- a common mode clamp circuit for the preamplifier;
- a residue stage having inputs wherein the inputs of the residue stage are coupled to the outputs of the ADC logic,
- wherein preamplifier is self-biased.
4 more elements
A device, comprising:
- a preamplifier circuit comprising:
- a first pair of transistors, each transistor of the first pair of transistors having a control terminal, a first current terminal, and a second current terminal, wherein each respective control terminal is coupled to a control signal node, wherein each respective first current terminal is coupled to a supply voltage node, and wherein each respective second current terminal is coupled to a respective differential output node;
- a second pair of transistors, each transistor of the second pair of transistors having a control terminal coupled to a respective differential input node, a first current terminal coupled to a respective differential output node, and a second current terminal coupled to a shared tail node;
- and
- a common mode clamp circuit.
2 more elements
Dependencies are inferred from the claim text.