Apparatus and method for reducing output skew and transition delay of level shifter

Abstract

An apparatus and method are provided. According to one embodiment, an apparatus includes a level-shifter circuit configured to output voltages Vo1+ and Vo1−; and an output alignment circuit configured to output voltages Vo+ and Vo− that are triggered by an edge of a combination of Vo1+ and Vo1−, and where Vo+ and Vo− are set by high states of Vo1+ and Vo1− prior to a transition on an input of the level-shifter circuit, and the method includes outputting, by a level-shifter circuit, voltages Vo1+ and Vo1−; and outputting, by an output alignment circuit, voltages Vo+ and Vo− that are triggered by an edge of a combination of Vo1+ and Vo1−, and where Vo+ and Vo− are set by high states of Vo1+ and Vo1− prior to a transition on an input of the level-shifter circuit.

Dependencies are inferred from the claim text.