Fabrication of interlayer dielectrics with high quality interfaces for quantum computing devices
AssigneeGoogle Inc.
InventorAnthony Edward Megrant
Life of this patent
Estimating the term…
Loading patent…
AssigneeGoogle Inc.
InventorAnthony Edward Megrant
Estimating the term…
A method includes: providing a first wafer including a first substrate, a first insulator layer on the first substrate, and a first dielectric layer on the first insulator layer; providing a second wafer including a second substrate, a second insulator layer on the second substrate, and a second dielectric layer on the second insulator layer; forming a first superconductor layer on the first dielectric layer; forming a second superconductor layer on the second dielectric layer; joining a surface of the first superconductor layer to a surface of the second superconductor layer to form a wafer stack; and forming a third superconductor layer on exposed first surface of the first dielectric layer.
A method of fabricating a device comprising:
Dependencies are inferred from the claim text.