Semiconductor device, inverter circuit, driving device, vehicle, and elevator

A semiconductor device comprising:

• a silicon carbide layer having a first plane and a second plane facing the first plane, the first plane and the second plane being parallel to a first direction and a second direction perpendicular to the first direction;
• a first trench provided in the silicon carbide layer, the first trench extending in the first direction on the first plane, and the first trench having a first side plane, a second side plane, and a first bottom plane between the first side plane and the second side plane;
• a first gate electrode located in the first trench;
• a first gate insulating layer located between the first gate electrode and the silicon carbide layer;
• a second trench provided in the silicon carbide layer, the second trench extending in the first direction on the first plane, and the second trench having a third side plane facing the second side plane, a fourth side plane, and a second bottom plane between the third side plane and the fourth side plane;
• a second gate electrode located in the second trench;
• a second gate insulating layer located between the second gate electrode and the silicon carbide layer;
• a first silicon carbide region of n-type located in the silicon carbide layer;
• a second silicon carbide region of p-type located in the silicon carbide layer, the second silicon carbide region being located between the first silicon carbide region and the first plane, and the second silicon carbide region being located between the first trench and the second trench;
• a third silicon carbide region of n-type located in the silicon carbide layer and located between the second silicon carbide region and the first plane;
• a fourth silicon carbide region of n-type located in the silicon carbide layer and located between the second silicon carbide region and the first plane, the third silicon carbide region being interposed between the first trench and the fourth silicon carbide region;
• a fifth silicon carbide region of p-type located in the silicon carbide layer and located between the first silicon carbide region and the first trench, the fifth silicon carbide region covering the first bottom plane;
• a sixth silicon carbide region of p-type located in the silicon carbide layer and located between the first silicon carbide region and the second trench, the sixth silicon carbide region covering the second bottom plane, and the first silicon carbide region being interposed between the fifth silicon carbide region and the sixth silicon carbide region;
• a seventh silicon carbide region of n-type located in the silicon carbide layer and located between the fifth silicon carbide region and the second silicon carbide region;
• an eighth silicon carbide region of n-type located in the silicon carbide layer and located between the sixth silicon carbide region and the second silicon carbide region;
• a plurality of ninth silicon carbide regions of p-type located in the silicon carbide layer and located between the fifth silicon carbide region and the second silicon carbide region, the ninth silicon carbide regions being in contact with the fifth silicon carbide region and the second silicon carbide region, and the ninth silicon carbide regions being repeatedly disposed in the first direction;
• and
• a plurality of tenth silicon carbide regions of p-type located in the silicon carbide layer and located between the sixth silicon carbide region and the second silicon carbide region, the tenth silicon carbide regions being in contact with the sixth silicon carbide region and the second silicon carbide region, and tenth silicon carbide regions being repeatedly disposed in the first direction, wherein
• the seventh silicon carbide region is interposed between the ninth silicon carbide region and the second side plane and the eighth silicon carbide region is interposed between the tenth silicon carbide region and the third side plane.