Semiconductor devices
AssigneeSamsung Electronics Co., Ltd.
InventorsJee Yong Kim, Jung Hwan Lee
Life of this patent
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Abstract
A semiconductor device includes a substrate including a recess, the recess being positioned below an isolation region and having a side portion including a plurality of stepped portions, a plurality of gate electrodes spaced apart from each other on the substrate, and stacked in a direction perpendicular to an upper surface of the substrate, a channel structure passing between a first set of the plurality of gate electrodes, and the isolation region passing between a second set of the plurality of gate electrodes, the isolation region extending from the upper surface of the substrate and having an inclined lateral surface.
Claims30
A semiconductor device comprising:
- a substrate including a recess, the substrate defining the recess to include a first region, a second region and a third region having different widths;
- a stack structure including a plurality of gate electrodes and a plurality of mold insulating layers alternately stacked on the substrate;
- a common source pattern passing through the stack structure to contact the substrate at the first region of the recess;
- and
- an insulating spacer between the stack structure and the common source pattern, the insulating spacer including silicon nitride.
A semiconductor device comprising:
- a substrate including a recess, the substrate defining the recess to include a first region, a second region and a third region having different widths;
- a stack structure including a plurality of gate electrodes and a plurality of mold insulating layers alternately stacked on the substrate;
- a common source pattern passing through the stack structure to contact the substrate at the first region of the recess;
- and
- an insulating spacer between the stack structure and the common source pattern, the insulating spacer including silicon compound containing nitrogen.
A semiconductor device comprising:
- a substrate including a recess, the substrate defining the recess to include a first region, a second region and a third region having different widths;
- a stack structure including a plurality of gate electrodes and a plurality of mold insulating layers alternately stacked on the substrate;
- a peripheral circuit region below the substrate and on a base substrate, the peripheral circuit region including a plurality of transistors and a plurality of wirings, the peripheral circuit region overlapping the stack structure in a direction perpendicular to an upper surface of the substrate;
- a common source pattern passing through the stack structure to contact the substrate at the first region of the recess, the common source pattern extending in a direction parallel to an upper surface of the substrate;
- and
- an insulating spacer between the stack structure and the common source pattern, the insulating spacer including silicon compound containing nitrogen.
A semiconductor device comprising:
- a substrate including a recess, the substrate defining the recess to include a first region, a second region and a third region having different widths;
- a stack structure including a plurality of gate electrodes and a plurality of mold insulating layers alternately stacked on the substrate;
- a peripheral circuit region below the substrate and on a base substrate, the peripheral circuit region including a plurality of transistors and a plurality of wirings, the peripheral circuit region overlapping the stack structure in a direction perpendicular to an upper surface of the substrate;
- a common source pattern passing through the stack structure to contact the substrate at the first region of the recess;
- an insulating spacer between the stack structure and the common source pattern, the insulating spacer including silicon compound containing nitrogen;
- an upper insulating layer on the stack structure;
- a channel structure passing through the stack structure;
- and
- a contact plug passing through the upper insulating layer, and electrically connecting to the channel structure.
Dependencies are inferred from the claim text.