Semiconductor chip integrating high and low voltage devices
AssigneeAlpha and Omega Semiconductor Incorporated
InventorHideaki Tsuchiko
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Abstract
The present invention is directed to a semiconductor chip comprising a high voltage device and a low voltage device disposed thereon. The chip may be formed in several different configurations. For example, the semiconductor chip may include a NPN bipolar transistor, PNP bipolar transistor, a diode, an N channel DMOS transistor and the like. the first doped well being configured as a base of the DMOS transistor, a P channel DMOS transistor and the like. These and other embodiments are described in further detail below.
Claims7
A semiconductor chip comprising a high voltage device and a low voltage device disposed thereon, said semiconductor chip further comprising:
- a substrate layer of a first conductivity type;
- a first epitaxial layer of the first conductivity type on a top surface of the substrate layer;
- a second epitaxial layer of a second conductivity opposite to the first conductivity type on a top surface of the first epitaxial layer;
- a deep buried implant region of the second conductivity type in an area for the high voltage device;
- a buried implant region of the second conductivity type in an area for the low voltage device;
- and
- a first doped well of the first conductivity type extending from a top surface of the second epitaxial layer above the deep buried implant region;
- and a second doped well of the first conductivity type from a top surface of the second epitaxial layer above the buried implant region, wherein the second doped well of the first conductivity type has a greater doping concentration than the first epitaxial layer and substrate.
A semiconductor chip comprising a high voltage device and a low voltage device disposed thereon, said semiconductor chip further comprising:
- a substrate layer of a first conductivity type;
- a first epitaxial layer of the first conductivity type on a top surface of the substrate layer;
- a second epitaxial layer of a second conductivity opposite to the first conductivity type on a top surface of the first epitaxial layer;
- a deep buried implant region of the second conductivity type in an area for the high voltage device, wherein the deep buried implant region of the second conductivity type further comprises a deep buried highly doped region of the second conductivity type and a deep buried lightly doped region of the second conductivity type surrounding the deep buried highly doped region;
- a buried implant region of the second conductivity type in an area for the low voltage device;
- and
- a first doped well of the first conductivity type extending from a top surface of the second epitaxial layer above the deep buried implant region;
- and a second doped well of the first conductivity type from a top surface of the second epitaxial layer above the buried implant region.
A semiconductor chip comprising a high voltage device and a low voltage device disposed thereon, said semiconductor chip further comprising:
- a substrate layer of a first conductivity type;
- a first epitaxial layer of the first conductivity type on a top surface of the substrate layer, with the dopant concentration of the first epitaxial layer being substantially the same as the substrate;
- a second epitaxial layer of a second conductivity opposite to the first conductivity type on a top surface of the first epitaxial layer;
- a deep buried implant region of the second conductivity type in an area for the high voltage device, said deep buried region includes a highly doped region of the second conductivity type and a deep buried lightly doped region of the second conductivity type surrounding the deep buried highly doped region;
- a buried implant region of the second conductivity type in an area for the low voltage device;
- a first doped well of the first conductivity type extending from a top surface of the second epitaxial layer above the deep buried implant region;
- and a second doped well of the first conductivity type from a top surface of the second epitaxial layer above the buried implant region;
- and
- isolation regions surrounding active areas of the high voltage device and said low voltage device.
Dependencies are inferred from the claim text.