Memory arrays, and methods of forming memory arrays

A memory array, comprising:

• a vertical stack of alternating insulative levels and wordline levels;
• channel material extending vertically along the stack;
• conductive segments along the wordline levels;
• individual of the conductive segments having, along a cross-section, first and second ends in opposing relation to one another;
• the conductive segments comprising gates and wordlines adjacent the gates;
• the wordlines encompassing the second ends;
• the gates having substantially parabolic noses encompassing the first ends, the substantially parabolic noses extending outwardly toward the channel material;
• and
• memory cell structures along the wordline levels and located between the channel material and the parabolic noses of the gates;
• the memory cell structures including charge-storage regions and charge-blocking regions;
• the charge-blocking regions being between the charge-storage regions and the gates.