US 10,770,451 B2Granted

Thin-film ESD protection device

AssigneeMurata Manufacturing Co., Ltd.

InventorSouko Fukahori

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Abstract

A thin-film ESD protection device that includes a semiconductor substrate having a first and second principal surfaces); a first insulating layer disposed on the first principal surface; a second insulating layer disposed formed on the second principal surface; and first and second input/output electrodes, ground electrodes, a diode element, a capacitor element, and an inductor element. The capacitor element and the diode element are formed adjacent to the first principal surface, whereas the inductor element is formed adjacent to the second principal surface. The inductor element is connected to the first input/output electrode and the second input/output electrode by a first via conductor and a second via conductor, respectively, that pass through the semiconductor substrate from the first principal surface to the second principal surface.

Claims20

Dependent claims

A thin-film ESD protection device comprising:

a semiconductor substrate having first and second principal surfaces that oppose each other;
a first insulating layer disposed on the first principal surface;
a first input/output electrode, a second input/output electrode, and a ground electrode each disposed on a surface of the first insulating layer;
a diode element disposed adjacent to the first principal surface of the semiconductor substrate and electrically connected between the first input/output electrode and the ground electrode;
a capacitor element disposed adjacent to the first principal surface of the semiconductor substrate and electrically connected between the second input/output electrode and the ground electrode;
and
an inductor element disposed adjacent to the second principal surface of the semiconductor substrate and electrically connected to the first input/output electrode by a first via conductor passing through the semiconductor substrate between the first and second principal surfaces and to the second input/output electrode by a second via conductor passing through the semiconductor substrate between the first and second principal surfaces.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/227,155Filed 20 Dec 2018 · continuation
Priority: JP 2017-05221417 Mar 2017
Published: US 2019/0123040 A125 Apr 2019
Granted: 8 Sep 2020
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

H10D 89/911
For devices having insulated gate electrodes, e.g. for IGFETs or IGBTs: using passive elements as protective elements
H10D 89/611
For devices having insulated gate electrodes, e.g. for IGFETs or IGBTs: using diodes as protective elements
H10P 14/40
Formation of materials, e.g. in the shape of layers or pillars: of conductive or resistive materials
H10W 20/43
Characterised by their conductive parts: layouts of interconnections

Family

PCT/JP2018/000631Parent of this continuation · filed 12 Jan 2018
US 2019/0123040 A1Pre-grant publication · published 25 Apr 2019
US 10,770,451 B2This patent

From the US filing history. Foreign family members aren’t listed.

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