Chip package structure and method for forming the same

A method for forming a chip package structure, comprising:

• forming a conductive via structure in a substrate;
• bonding a chip to a first surface of the substrate;
• forming a barrier layer over a second surface of the substrate, wherein the barrier layer is in direct contact with the substrate;
• forming a first insulating layer partially over the barrier layer;
• forming a conductive pad over the first insulating layer, wherein the conductive pad has a first portion and a second portion, the first portion passes through the barrier layer and the first insulating layer to connect with the conductive via structure, and the second portion passes through the first insulating layer and is in direct contact with the barrier layer;
• forming a second insulating layer over the first insulating layer and the conductive pad;
• and
• forming a conductive bump over the second insulating layer, wherein a first bottom portion of the conductive bump passes through the second insulating layer to connect with the second portion of the conductive pad.

A chip package structure, comprising:

• a first substrate;
• a conductive via structure passing through the first substrate;
• a chip over a first surface of the first substrate;
• a barrier layer over a second surface of the first substrate, wherein the barrier layer is in direct contact with the first substrate;
• a first insulating layer over the barrier layer;
• a conductive pad over the first insulating layer, wherein the conductive pad has a first portion and a second portion, the first portion passes through the barrier layer and the first insulating layer to connect with the conductive via structure, and the second portion passes through the first insulating layer and is in direct contact with the barrier layer;
• and
• a conductive bump over the second portion of the conductive pad.