Chip packaging structure and method, and electronic device

A chip packaging method, comprising:

• disposing a chip on an upper surface of a support, and connecting a chip pad on an upper surface of the chip to an external pad of the support by a bonding wire;
• connecting at least one conductor to a ground pad of the chip pad, and a maximum distance from the conductor to the support being greater than a maximum distance from the bonding wire to the support;
• packaging the support, the chip and the conductor to form a package;
• wherein a shortest distance from the conductor to the upper surface of the package is less than a shortest distance from the bonding wire to the upper surface of the package;
• and
• wherein the conductor comprises a first end and a second end which are two free ends located oppositely in a length of the conductor, the first end is connected to the ground pad of the chip pad, the second end extends towards the upper surface of the package, and an end surface of the second end being covered with the package.

A chip packaging structure, comprising:

• a support;
• a chip;
• at least one conductor;
• and
• a package for plastic packaging the support, the chip, and the conductor;
• the chip being disposed on an upper surface of the support, a chip pad being formed on an upper surface of the chip, and the chip pad being connected to an external pad of the support by a bonding wire;
• the conductor being connected to a ground pad of the chip pad and comprising a crest portion disposed closer to an upper surface of the package than any other portions of the conductor, and the crest portion being covered with the package;
• and
• the distance from the crest portion to the upper surface of the package being less than a shortest distance from the bonding wire to the upper surface of the package.