Silicon carbide and silicon nitride interconnects

Abstract

A method for fabricating an interconnect for integrated circuit is described. A recess is provided in a first dielectric layer comprising a first dielectric and a second dielectric layer comprised of a second dielectric. The first and second dielectric layers are disposed over a substrate. The second dielectric layer is disposed over the first dielectric layer. The recess is filled with a metal conductor. A chemical mechanical polishing process removes the metal conductor from field areas on the second dielectric layer. The second dielectric layer is removed. An interconnect element is created having a top face which protrudes higher than a top face of the first dielectric layer. The metal conductor of the interconnect element has direct contact with the first dielectric layer. In other aspects of the invention, the interconnect structure is described.

Dependencies are inferred from the claim text.