Transistor with recessed cross couple for gate contact over active region integration

An apparatus comprising:

• a semiconductor structure including a substrate having a first region and a second region;
• a first source/drain disposed on the substrate in the first region;
• an interlevel dielectric (ILD) disposed on the source/drain;
• a first gate disposed on the substrate;
• a first spacer disposed between the first source/drain and the first gate;
• a first contact trench within the ILD extending to the first source/drain;
• a first trench contact within the first contact trench;
• a first source/drain contact trench extending to the first trench contact;
• a cross couple contact trench within the ILD;
• and
• a cross couple contact disposed in the cross couple contact trench in contact with the first gate and the first trench contact, the cross couple contact coupling the first source/drain and the first gate such that the cross couple contact is substantially connected to a singular surface of the first source/drain.