Controlling active fin height of FinFET device using etch protection layer to prevent recess of isolation layer during gate oxide removal

A method for fabricating a semiconductor device, comprising:

• forming a vertical semiconductor fin on a semiconductor substrate, the vertical semiconductor fin having a first width;
• forming an isolation layer on the semiconductor substrate, wherein the isolation layer covers a bottom portion of the vertical semiconductor fin, and wherein an active portion of the vertical semiconductor fin extends above a surface of the isolation layer;
• selectively oxidizing a surface of the active portion of the vertical semiconductor fin to thereby form a sacrificial gate oxide layer;
• forming a gate structure over a portion of the active portion of the vertical semiconductor fin;
• opening the gate structure to form a gate opening which exposes a portion of the sacrificial gate oxide layer within the gate opening;
• forming a first etch protection layer on a portion of the isolation layer exposed within the gate opening;
• and
• etching the exposed portion of the sacrificial gate oxide layer to remove the sacrificial gate oxide layer within the gate opening, wherein the first etch protection layer protects the exposed portion of the isolation layer from being etched during the etching of the sacrificial gate oxide layer, and wherein removing the sacrificial gate oxide layer results in thinning the active portion of the vertical semiconductor fin within the gate opening to a second width, which is less than the first width of the bottom portion of the vertical semiconductor fin covered by the isolation layer.