Integrated circuit with improved resistive region

An integrated circuit, comprising:

• a semiconductor substrate doped with a first conductivity type;
• a semiconductor well doped with the first conductivity type, wherein a bottom of the semiconductor well is isolated from the semiconductor substrate by a buried semiconductor region doped with a second conductivity type;
• an upper trench isolation extending from a front surface of the semiconductor well to a depth located a distance from the bottom of the semiconductor well;
• at least two additional isolating zones that are electrically insulated from the semiconductor well and which extend inside the semiconductor well in a first direction and extend vertically from the front surface to the bottom of the semiconductor well;
• at least one hemmed resistive region bounded by said at least two additional isolating zones, the upper trench isolation and the buried semiconductor region;
• and
• at least two contact zones located level with the front surface of the semiconductor well and being electrically coupled to said at least one hemmed resistive region;
• wherein said buried semiconductor region is configured to be biased to change a resistance of the at least one hemmed resistive region extending between the at least two contact zones.