No-verify programming followed by short circuit test in memory device

A method, comprising:

• storing write data for a first group of memory cells of a block in a volatile storage, the first group of memory cells is connected to multiple word lines of a set of word lines;
• programming the first group of memory cells using the write data without performing a verify test;
• in response to completion of the programming, concurrently testing the multiple word lines for a short circuit;
• and
• in response to the testing indicating that there is no short circuit, replacing the write data for the first group of memory cells with write data for a next group of memory cells of the block and programming the next group of memory cells of the block.

An apparatus, comprising:

• a set of word lines;
• a block of memory cells, the memory cells are connected to the set of word lines and include memory cells connected to an initial word line of the block;
• and
• a control circuit connected to the memory cells, the control circuit is configured to apply a first single program pulse having an initial magnitude to the initial word line, obtain a count of number of the memory cells connected to the initial word line having a threshold voltage greater than a read voltage, determine an adjusted magnitude which is greater than the initial magnitude based on the count, and apply a second single program pulse having the adjusted magnitude to the initial word line without performing a verify test, to complete programming of the memory cells connected to an initial word line.