Programmable resistive memory formed by bit slices from a standard cell library
AssigneesAttopsemi Technology Co., LTD, Renesas Electronics Corporation
InventorsShine C. Chung, Koji Nii
Life of this patent
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Abstract
Architecture, design, structure, layout, and method of forming a Programmable Resistive Device (PRD) memory in standard cell library are disclosed. The PRD memory has a plurality of PRD cells. At least one of the PRD cells can have a PRD element coupled to a first supply voltage line and coupled to a second supply voltage line through a program selector. The PRD cells reside in a standard cell library and following most of the standard cell design and layout guidelines.
Claims20
A Programmable Resistive Device (PRD) memory integrated in an integrated circuit, the PRD memory comprising:
- a plurality of PRD cells;
- and
- at least one of the plurality of PRD cells including at least:
- a PRD element,
- a program selector,
- the PRD element is coupled to a first supply voltage line and to the program selector, which is further coupled to a second supply voltage and/or one enable signal, and
- the PRD cell has at least one latch built-in as a sense amplifier,
- wherein the PRD cell is built from one or more basic cells in a standard cell library and follows standard cell design and layout guidelines associated with the standard cell library,
- wherein the PRD cell has an interface unit coupled to the other PRD cells,
- wherein the PRD memory is built with replica of the PRD cell with at least one peripheral cell and
- wherein the PRD element can be configured to be programmable by applying voltages to the first supply voltage line, the second supply voltage line and/or the enable signal to change resistance of the PRD element into a different logic state.
An electronic system, comprising:
- a processor;
- and
- a PRD memory operatively connected to the processor, the PRD memory includes at least a plurality of PRD cells for providing data storage, at least one of the plurality of PRD cells comprising:
- a PRD element,
- a program selector,
- the PRD element is coupled to a first supply voltage line and to the program selector, which is further coupled to a second supply voltage and/or one enable signal, and
- the PRD cell has at least one latch built-in as a sense amplifier,
- wherein the PRD cell is built from basic cell in a standard cell library and in accordance with design and layout guidelines of the standard cell library,
- wherein the PRD cell has at least one interface unit coupled to the other PRD cells, and
- wherein the PRD element is configured to be programmable by applying voltages to the first supply voltage line, the second supply voltage line and/or the enable signal to change resistance into a different logic state.
A method for placing a PRD memory in an integrated circuit design, the method comprising:
- placing a plurality of cells into the integrated circuit design, at least one of the cells comprising a plurality of PRD cells, and at least one of the PRD cells including at least:
- a PRD element, a program selector, at least one sense amplifier, and at least one interface unit,
- the PRD element being coupled to a first supply voltage line and to the program selector,
- the program selector being coupled to a second supply voltage and/or one enable signal, and
- the at least one interface unit being coupled to the other PRD cells,
- wherein the PRD element is built from one or more basic cells in a standard cell library while following design and layout guidelines associated with the standard cell library;
- and
- wherein the PRD element is configured to be programmable by applying voltages to the first supply voltage lines, the second supply voltage line and/or the enable signal to change resistance of the PRD element into a different logic state.
Dependencies are inferred from the claim text.