Detecting a faulty memory block

A storage system, configured to detect a faulty block in a memory array during operation of the storage system, comprising:

• the memory array;
• and
• a controller coupled to the memory array, wherein the controller is configured to:
• perform a read operation on a memory block of the memory array, the read operation generating a failed bit count;
• determine the failed bit count is above a value associated with an overall failed bit count;
• determine the failed bit count is above a threshold value;
• in response to the failed bit count being above the threshold value;
• perform a confirmation process on the memory block, the confirmation process defining a number of consecutive erase cycles and a level of an erase cycle, and the confirmation process resulting in erase pass or erase fail;
• and
• mark the memory block for garbage collection in response to determining the confirmation process results in erase fail;
• and
• update, based on the failed bit count, the value associated with the overall failed bit count, wherein the value associated with the overall failed bit count is a median failed bit count.

A method for detecting a faulty block in a memory system during operation of the memory system, comprising:

• performing a read operation on a memory block, the read operation generating a failed bit count;
• determining the failed bit count is above a threshold value;
• and
• in response to the failed bit count being above the threshold value:
• performing a confirmation process on the memory block, the confirmation process defining a level of an erase cycle, and the confirmation process resulting in erase pass or erase fail;
• and
• marking the memory block for garbage collection in response to determining the confirmation process results in erase fail;
• wherein the number of the consecutive erase cycles is determined based on at least one selected from a group comprising:
• a different in value between the overall failed bit count and an initial failed bit count;
• a number of erase cycles performed on the memory system;
• and a result of a flash write.

A memory controller, comprising:

• a first terminal configured to couple to a memory array,
• the memory controller configured to:
• perform a read operation on a memory block, the read operation generating a failed bit count;
• determine the failed bit count is above a threshold value;
• and
• in response to the failed bit count being above the threshold value:
• perform a confirmation process on the memory block, the confirmation process defining a level of an erase cycle, and the confirmation process resulting in erase pass or erase fail;
• and
• mark the memory block for garbage collection in response to determining the confirmation process results in erase fail;
• wherein the level of the erase cycle is determined based on at least one selected from a group comprising:
• a difference in value between the overall failed bit count and an initial failed bit count;
• a number of program and erase cycles performed on the memory system;
• and a result of a flash write.