Semiconductor memory devices and memory systems having the same

A semiconductor memory device comprising:

• a power-up signal generator configured to generate a power-up signal in response to a memory voltage reaching a target voltage level;
• an initializer configured to generate an initialization signal in response to the power-up signal and a reset signal and to generate an initial refresh command and an initial write command in response to completion of an initialization operation;
• an initial data driver configured to drive initial data in response to the initial write command;
• and
• a memory cell array comprising a plurality of memory cells connected between a plurality of word lines and a plurality of bit lines, the memory cell array configured to perform an initial write operation of writing the initial data to the plurality of memory cells in response to the initial refresh command and the initial write command.

A memory system comprising:

• a controller configured to generate a reset signal in response to a power-up operation signal or a reset operation signal;
• and
• a memory configured to receive the reset signal,
• wherein the memory comprises:
• a power-up signal generator configured to generate a power-up signal in response to a memory voltage reaching a target voltage level;
• an initializer configured to generate an initialization signal in response to the power-up signal and the reset signal and to generate an initial refresh command in response to completion of an initialization operation;
• and
• a memory cell array comprising a plurality of memory cells connected between a plurality of word lines and a plurality of bit lines, the memory cell array configured to perform an initial refresh operation on the plurality of memory cells in response to the initial refresh command.