Nonvolatile memory device and operating method of the same

A nonvolatile memory device comprising:

• a memory cell array comprising a plurality of flash memory cells connected to a plurality of bit lines;
• a row decoder configured to be connected by a plurality of word lines, a string selection line, and a ground selection line;
• a page buffer configured to transfer a bit line voltage on the plurality of bit lines and detect data stored in the flash memory cells through at least one bit line among the plurality of bit lines;
• and
• a control logic performing verification on a selected memory cell by reading an adjacent word line of a selected word line addressing the selected memory cell and adjusting charge sharing between the selected memory cell and a sensing node, which is connected to the selected memory cell through the at least one bit line, based on a result of reading the adjacent word line, wherein:
• the control logic changes a sensing time based on a result of reading the adjacent word line, and
• the sensing time is a time that a bit line sensing signal is applied to control charge sharing of the sensing node.

A method executed by a nonvolatile memory device, the method comprising:

• programming a selected memory cell addressed by a selected word line;
• reading an adjacent memory cell addressed by an adjacent word line, which is adjacent to the selected word line, to determine a program state of the adjacent memory cell;
• determining, based upon the program state, whether to apply a first verification operation or a second verification operation, which differs from the first verification operation, as a selected verification operation;
• and
• applying the selected verification operation to the selected memory cell for determining whether the selected memory cell is programmed to a predetermined program state.