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US 10,770,140 B2Granted
Memristive array with parallel reset control devices
AssigneeHewlett Packard Enterprise Development LP
InventorsJohn Paul Strachan, Brent Buchanan, Le Zheng
Life of this patent
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Abstract
The present disclosure provides a memristive array. The array includes a number of memristive devices. A memristive device is switchable between states and is to store information. The memristive array also includes a parallel reset control device coupled to the number of memristive devices in parallel. The parallel reset control device regulates a resetting operation for the number of memristive devices by regulating current flow through target memristive devices.
Claims16
A memristive array comprising:
- a number of memristive devices, wherein a memristive device is switchable between states and is to store information;
- and
- a parallel reset control device coupled to the number of memristive devices in parallel to regulate a resetting operation for the number of memristive devices by regulating current flow through target memristive devices, wherein the regulating of the resetting operation comprises drawing current away from a target memristive device as the target memristive device approaches a target state of the states between which the memristive device is switchable,
- wherein the parallel reset control device comprises multiple sets of fixed value resistors each being coupled in parallel to a respective set of memristive devices and wherein the parallel reset control device comprises a plurality of parallel reset controllers, each parallel reset controller comprising a set of fixed value resistors of the multiple sets of fixed value resistors, each parallel reset controller being coupled in parallel to a set of the number of memristive devices in a row of the memristive array.
1 more element
A method for programming a memristive array comprising:
- selecting a target state for a target memristive device;
- setting a resistance of a parallel reset controller coupled to the target memristive device to a resistance value that corresponds to the target state, wherein the parallel reset controller comprises multiple sets of fixed value resistors each being coupled in parallel to a respective set of memristive devices comprising the target memristive device, and wherein the parallel reset controller is configured to regulate a resetting operation by drawing current away from a target memristive device as the target memristive device approaches the target state;
- programming a state of the target memristive device to the target state by:
- generating a voltage potential across the target memristive device by applying a first voltage to a row line corresponding to the target memristive device and a ground voltage to a first column line corresponding to the target memristive device;
- and
- generating a voltage potential across the parallel reset controller.
3 more elements
A memristive crossbar array comprising:
- a number of row lines;
- a number of column lines intersecting the row lines to form a number of junctions;
- a number of memristive devices coupled between the row lines and the column lines at the junctions, wherein a memristive device is switchable between states to store information;
- multiple parallel reset controllers, a parallel reset controller coupled to a row line to regulate current through a corresponding row of memristive devices by drawing current away from a target memristive devices when a resistance of the target memristive device reaches a threshold value, the drawing including activating a corresponding fixed value resistor of a set of fixed value resistors coupled in parallel to the target memristive devices, the corresponding fixed value resistor having a resistance level associated with the target state, and wherein the parallel reset controllers each comprise multiple sets of fixed value resistors each being coupled in parallel to a respective row of a set of the number of memristive devices.
1 more element
A method for programming a memristive array comprising:
- selecting a target state for a target memristive device;
- setting a resistance of a parallel reset controller coupled to the target memristive device to a resistance value that corresponds to the target state, wherein the parallel reset controller comprises multiple sets of fixed value resistors each being coupled in parallel to a respective set of memristive devices comprising the target memristive device, and wherein the parallel reset controller is configured to regulate a resetting operation by drawing current away from a target memristive device as the target memristive device approaches the target state;
- programming a state of the target memristive device to the target state by:
- generating a voltage potential across the target memristive device;
- and
- generating a voltage potential across the parallel reset controller by applying first voltage to a row line corresponding to the target memristive device and grounding a second column line corresponding to a fixed value resistor of the parallel reset controller.
3 more elements
Dependencies are inferred from the claim text.