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AssigneeSharp Kabushiki Kaisha
InventorsTakatsugu Kusumi, Takuya Watanabe, Akira Tagawa, Yasuaki Iwase, Yohei Takeuchi
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The present application discloses a scanning signal line drive circuit capable of reducing power consumption and narrowing a picture-frame while ensuring high-speed scanning for image display. First and second gate drivers 410, 420 are arranged to face each other via a display unit 500. Based on a DC buffer method, odd-numbered gate lines are driven by the first gate driver 410 while even-numbered gate bus lines are driven by the second gate driver 420, and when each gate bus line GLi is to be brought into a non-selected state, charges are released from both ends thereof. For this purpose, for example, the end portion of the odd-numbered gate bus line on the first gate driver side is connected to a buffer made up of the activation and inactivation transistors M10, M13L, and the end portion of the odd-numbered gate bus line on the second gate driver side is connected to the inactivation auxiliary transistor M13R.
A scanning signal line drive circuit that selectively drives a plurality of scanning signal lines provided on a display unit of a display device, the scanning signal line drive circuit comprising:
A driving method for selectively driving a plurality of scanning signal lines provided on a display unit of a display device, the driving method comprising:
Dependencies are inferred from the claim text.