Machine learning accelerator architecture
AssigneeIntel Corporation
InventorsBharat Daga, Pradeep Janedula, Aravind Babu Srinivasan, Ambili Vengallur
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AssigneeIntel Corporation
InventorsBharat Daga, Pradeep Janedula, Aravind Babu Srinivasan, Ambili Vengallur
Estimating the term…
An apparatus to facilitate acceleration of machine learning operations is disclosed. The apparatus comprises accelerator circuitry including a first set of processing elements to perform first computations including matrix multiplication operations, a second set of processing elements to perform second computations including sum of elements of weights and offset multiply operations and a third set of processing elements to perform third computations including sum of elements of inputs and offset multiply operations, wherein the second and third computations are performed in parallel with the first computations.
An apparatus to facilitate acceleration of machine learning operations, comprising accelerator circuitry, including:
A method to facilitate acceleration of machine learning operations, comprising:
An accelerator comprising:
Dependencies are inferred from the claim text.