Automatic moving of probe locations for parasitic extraction

A method, executed by at least one processor of a computer, comprising:

• selecting a cell port of a first cell conductively connected to an original probe location as a new probe location, the original probe location being on a geometric element representing a device pin of the circuit design on a physical layer of a layout design of a circuit design or a cell port of a second cell, the second cell being inside the first cell;
• and
• extracting, from the layout design, a parasitic resistance value for parasitic resistance between a geometric element representing a circuit pad or another device pin and the new probe location.

One or more non-transitory computer-readable media storing computer-executable instructions for causing one or more processors to perform a method, the method comprising:

• selecting a cell port of a first cell conductively connected to an original probe location as a new probe location, the original probe location being on a geometric element representing a device pin of the circuit design on a physical layer of a layout design of a circuit design or a cell port of a second cell, the second cell being inside the first cell;
• and
• extracting, from the layout design, a parasitic resistance value for parasitic resistance between a geometric element representing a circuit pad or another device pin and the new probe location.