Devices for time division multiplexing of state machine engine signals

A device, comprising:

• a state machine lattice comprising:
• a plurality of blocks, each block of the plurality of blocks comprising:
• a plurality of rows, each row of the plurality of rows comprising:
• a plurality of configurable circuits, each configurable circuit of the plurality of configurable circuits comprising a plurality of automatons configured to analyze at least a portion of a data stream and each configurable circuit of the plurality of configurable circuits configured to selectively output a result of the analysis;
• and
• a local routing matrix comprising a common routing line directly coupled to at least two configurable circuits of the plurality of configurable circuits via respective output lines of a plurality of output lines and configured to receive the result from each configurable circuit of the at least two configurable circuits of the plurality of configurable circuits, wherein the common routing line is an output transmission line shared amongst the at least two configurable circuits of the plurality of configurable circuits, wherein the local routing matrix comprises a demultiplexer coupled to the common routing line, wherein the demultiplexer is configured to selectively transmit the result from a first configurable circuit of the at least two configurable circuits of the plurality of configurable circuits and selectively transmit the result from a second configurable circuit of the at least two configurable circuits of the plurality of configurable circuits subsequent to transmission of the result from the first configurable circuit of the at least two configurable circuits.

A device, comprising:

• a state machine lattice comprising:
• a plurality of blocks;
• an intra-block switch configured to route signals between the plurality of blocks;
• a row coupled to the intra-block switch, wherein the row comprises:
• a plurality of configurable circuits, each configurable circuit of the plurality of configurable circuits comprising a plurality of automatons configured to analyze at least a portion of a data stream and each configurable circuit of the plurality of configurable circuits configured to selectively output a result of the analysis;
• and
• a local routing matrix comprising a common routing line directly coupled to each of at least two configurable circuits of the plurality of configurable circuits via respective output lines of a plurality of output lines, wherein the local routing matrix is configured to receive the result from each configurable circuit of the at least two configurable circuits of the plurality of configurable circuits, wherein the common routing line is an output transmission line shared amongst the each of the at least two configurable circuits of the plurality of configurable circuits, wherein the local routing matrix comprises a demultiplexer coupled to the common routing line, wherein the common routing line is configured to transmit the result from each configurable circuit of the at least two configurable circuits to the demultiplexer, wherein the demultiplexer is configured to selectively transmit the result from each configurable circuit of the at least two configurable circuits received from the common routing line to the intra-block switch via a row lines selected by the demultiplexer.

A device, comprising:

• a state machine lattice comprising:
• a row, comprising a plurality of configurable circuits, each configurable circuit of the plurality of configurable circuits comprising a plurality of automatons configured to analyze at least a portion of a data stream and each configurable circuit of the plurality of configurable circuits configured to selectively output a result of the analysis;
• a plurality of row routing lines, wherein each row routing line is configured to be directly coupled to one or more configurable circuits of the plurality of configurable circuits via a respective output line of a plurality of output lines, wherein each row routing line is configured to transmit the result from each configurable circuit of the one or more configurable circuits directly coupled thereto;
• and
• an intra-block switch, wherein the intra-block switch comprises a multiplexer coupled to at least two row routing lines of the plurality of row routing lines, wherein the multiplexer is configured to selectively drive-out the result from each row routing line of the at least two row routing lines of the plurality of row routing lines to a common block routing line as a shared output transmission line.

A device, comprising:

• a state machine lattice, comprising:
• an input configured to receive a data stream;
• an inter-block switch circuit coupled to the input and to a block, wherein the inter-block switch circuit is configured to transmit to the block a time division multiplexed data signal that is generated based upon the data stream, wherein the block comprises:
• a demultiplexer configured to generate a demultiplexed data signal based upon the time division multiplexed signal;
• a storage element configured to receive and store the demultiplexed data signal;
• and
• a configurable circuit comprising a plurality of automatons configured to receive the demultiplexed data signal from the storage element and analyze at least a portion of the demultiplexed data signal, wherein the configurable circuit is configured to selectively output a result of the analysis.