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US 10,769,096 B2Granted
Apparatus and circuit for processing data
AssigneeSamsung Electronics Co., Ltd.
InventorHye-Jeong Kim
Life of this patent
Estimating the term…
Abstract
A circuit for processing data is provided. The circuit includes an Application Processor (AP), a Communication Processor (CP), and a storage unit including at least a first region which the AP and the CP access and from/to which data related to at least one of the AP and the CP is read/written, and a second region which the CP accesses and from/to which data related to the CP is read/written.
Claims18
A communication device comprising:
- a communication processor;
- an application processor comprising a direct memory access unit;
- and
- a memory comprising:
- a first memory region accessed by the communication processor and not by the application processor,
- a second memory region accessed by the communication processor and the application processor,
- a third memory region accessed by the application processor and not by the communication processor, and
- a fourth memory region accessed by the communication processor and the application processor for location information,
- wherein the communication processor:
- writes a first information in the first memory region,
- writes a second information in the second memory region, wherein the second information being scattered in the second memory region, and
- transmits, as an inter processor communication message, a fourth information indicative of a location of the second information which is scattered in the second memory region to the fourth memory region as a linked list, and
- wherein the application processor:
- identifies the location of the second information based on the fourth information in the fourth memory region,
- reads the second information from the second memory region using the direct memory access unit connected with the second memory region and the third memory region, and
- writes third information in the third memory region.
13 more elements
An integrated circuit package comprising:
- a communication processor;
- an application processor comprising a direct memory access unit;
- and
- a memory comprising:
- a first memory region accessed by the communication processor and not by the application processor,
- a second memory region accessed by the communication processor and the application processor,
- a third memory region accessed by the application processor and not by the communication processor, and
- a fourth memory region accessed by the communication processor and the application processor for location information,
- wherein the communication processor:
- writes a first information in the first memory region, and
- writes a second information in the second memory region, wherein the second information being scattered in the second memory region,
- writes an inter processor communication message in the fourth memory region, wherein the inter processor communication message comprises fourth information indicative of a location of the second information which is scattered in the fourth memory region as a linked list, and
- wherein the application processor:
- reads the inter processor communication message from the fourth memory region,
- identifies the location of the second information based on the fourth information,
- reads the second information from the second memory region using the direct memory access unit connected with the second memory region and the third memory region, and
- writes third information in the third memory region.
14 more elements
A communication device comprising:
- an application processor comprising a direct memory access unit;
- a communication processor;
- and
- a memory comprising:
- a first memory region accessed by the communication processor and not by the application processor,
- a second memory region accessed by the communication processor and the application processor, and
- a third memory region accessed by the application processor and not by the communication processor,
- wherein the application processor:
- writes a first information in the third memory region,
- writes a second information in the second memory region using the direct memory access unit connected with the second memory region and the third memory region, wherein the second information being scattered in the second memory region, and
- transmits, as an inter processor communication message, a fourth information indicative of a location of the second information which is scattered in the second memory region to a fourth memory region as a linked list, and
- wherein the communication processor:
- identifies the location of the second information based on the fourth information in the fourth memory region,
- reads the second information from the second memory region, and
- writes third information in the first memory region.
12 more elements
Dependencies are inferred from the claim text.