Load/store unit for a processor, and applications thereof

A processor that executes instructions out-of-program-order, comprising:

• a load/store queue that includes a plurality of entries, each entry of the load/store queue to store information associated with a respective memory access instruction during execution;
• a load/store graduation buffer that includes a plurality of entries, each entry of the load/store graduation buffer to store a pointer to a corresponding entry of the load/store queue;
• a fill/store buffer that includes a plurality of entries, each entry of the fill/store buffer to store information for a corresponding memory access instruction;
• and
• control logic coupled to the load/store queue, the load/store graduation buffer, and the fill/store buffer and when a pointer in the load/store graduation buffer is serviced and data is not available for the memory access instruction corresponding to the serviced pointer, the control logic is to:
• allocate a first entry in the fill/store buffer for the memory access instruction corresponding to the serviced pointer.

A tangible computer readable storage medium that includes a processor embodied in software, the processor comprising:

• a load/store queue that includes a plurality of entries, each entry of the load/store queue to store information associated with a respective memory access instruction during execution;
• a load/store graduation buffer that includes a plurality of entries, each entry of the load/store graduation buffer to store a pointer to a corresponding entry of the load/store queue;
• a fill/store buffer that includes a plurality of entries, each entry of the fill/store buffer to store information for a corresponding memory access instruction;
• and
• control logic coupled to the load/store queue, the load/store graduation buffer, and the fill/store buffer and when a pointer in the load/store graduation buffer is serviced and data is not available for the memory access instruction corresponding to the serviced pointer, the control logic is to:
• allocate a first entry in the fill/store buffer for the memory access instruction corresponding to the serviced pointer.