Information processing system, arithmetic processing circuit, and control method for information processing system

An arithmetic processing circuit comprising:

• a dividing circuit configured to divide a plurality of data blocks retained by the arithmetic processing circuit into groups of a number equal to the number of arithmetic processing circuits included in an information processing apparatus incorporating the own arithmetic processing circuit;
• a data selecting circuit configured to select respective first data blocks from the plurality of data blocks included in the respective groups;
• a transmission destination selecting circuit configured to select arithmetic processing circuits different from each other as respective transmission destinations from the plurality of arithmetic processing circuits included in the information processing apparatus for the respective first data blocks selected by the data selecting circuit based on destination number information obtained by exclusive disjunction operation on identification number information assigned to each arithmetic processing circuit and cyclic number information assigned to each group;
• and
• a transmitting circuit configured to transmit the respective first data blocks selected by the data selecting circuit to the respective arithmetic processing circuits selected by the transmission destination selecting circuit.

A control method for an information processing system including a plurality of information processing apparatuses, each of the plurality of information processing apparatuses incorporating a plurality of arithmetic processing circuits, each of the plurality of arithmetic processing circuits including a dividing circuit, a data selecting circuit, a transmission destination selecting circuit, and a transmitting circuit, the method comprising:

• dividing, by the dividing circuit, a plurality of data blocks retained by the arithmetic processing circuit into groups of a number equal to the number of the plurality of arithmetic processing circuits included in the information processing apparatus including the own device;
• selecting, by the data selecting circuit, respective first data blocks from the plurality of data blocks included in the respective groups;
• selecting, by the transmission destination selecting circuit, arithmetic processing circuits different from each other as respective transmission destinations from the plurality of arithmetic processing circuits included in the information processing apparatus for the respective first data blocks selected by the data selecting circuit based on destination number information obtained by exclusive disjunction operation on identification number information assigned to each arithmetic processing circuit and cyclic number information assigned to each group;
• and
• transmitting, by the transmitting circuit, the respective first data blocks selected by the data selecting circuit to the respective arithmetic processing circuits selected by the transmission destination selecting circuit.