US 10,768,859 B1Granted

History-based memory control system and method

AssigneesSK hynix Inc., Korea University Industry Cooperation Foundation

InventorsSeonwook Kim, Yoonah Paik, Jaeyung Jun

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Abstract

A memory controller uses a history of the rows accessed by commands from a command queue in a command queue circuit to predict whether a second access performed immediately after the command queue becomes empty will be to a same row as a first access performed immediately before the command queue became empty. When the second access is predicted to be to a different row, the row corresponding to the first access is closed in response to the command queue becoming empty. When the second access is predicted to be to the same row, the row corresponding to the first access is not closed in response to the command queue becoming empty.

Claims14

Dependent claims

A history-based memory control method comprising:

performing, by a memory controller when the memory controller is in a first mode, a closing act of closing an open row in response to a command queue in a command queue circuit becoming empty;
performing a first command queue determination act of determining whether the command queue is empty;
performing, by the memory controller, a first access determination act of determining whether a first condition is true, wherein the first condition is true when a first access made after the command queue became empty is to a row which was accessed immediately before the command queue became empty;
in response to the first condition being true, performing a second command queue determination act of determining whether the command queue is empty;
in response to the second command queue determination act determining that the command queue is empty, performing, by the memory controller, a second access determination act of determining whether a second condition is true, wherein the second condition is true when a second access from the command queue is made to a row in which a state transition has occurred;
and
setting the memory controller to a second mode when the second access determination act determines that second condition is true,
wherein the memory controller allows an open row to remain open when the command queue become empty and the memory controller is in the second mode.

5 more elements

A history-based memory control system comprising:

a memory device;
and
a memory controller configured to control accesses to the memory device based on access requests from a central processing system,
wherein the memory controller performs:
a closing act of closing an open row when a command queue in a command queue circuit in the memory controller is empty and the memory controller is in a first mode;
a first command queue determination act of determining whether the command queue is empty;
a first access determination act of determining whether a first access performed after the command queue was determined to be empty is made to a row which was accessed immediately before the command queue was determined to be empty;
a second command queue determination act of determining whether the command queue is empty, after performing the first access determination act;
a second access determination act of determining whether a second access from the command queue is made to a row in which a state transition has occurred;
and
setting the memory controller to a second mode when the second access from the command queue is made to the row in which a state transition has occurred,
wherein the memory controller allows an open row to remain open when the command queue becomes empty and the memory controller is in the second mode.

9 more elements

A history-based memory control method performed by a memory controller, the method comprising:

when the memory controller is in a first mode:
performing a first queue determination of whether a command queue in a command queue circuit is empty;
in response to the first queue determination determining that the command queue is empty, determining whether a first condition is true, wherein the first condition is true when a row accessed before the command queue became empty is the same as a row accessed after the command queue became empty;
and
in response to determining that the first condition is true:
performing a second queue determination of whether the command queue is empty,
in response to the second queue determination determining that the command queue is empty, determining whether a second condition is true, wherein the second condition is true when a row accessed after the second determination that command queue is empty is the same as a row accessed at a state transition, and
in response to determining that the second condition is true, setting the memory controller to a second mode;
and
when the memory controller is in the second mode:
determining whether an access is a row hit;
and
in response to determining that the access is not the row hit, setting the memory controller to the first mode.

10 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/449,172Filed 21 Jun 2019
Priority: KR 10-2019-004208010 Apr 2019
Granted: 8 Sep 2020
Term ends: Not estimatedThe source records don’t support an estimate.

Classification7 codes

G06F 3/0659
Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices: command handling…
G06F 13/1642
Based on arbitration: with request queuing
G06F 3/0604
Specifically adapted to achieve a particular effect: improving or facilitating administration, e.g. storage management
G06F 3/0673
In-line storage system: single storage device

Family

No related US applications are recorded in the indexed filing history.

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