Method for forming lead wires in hybrid-bonded semiconductor devices

A method for forming a semiconductor structure, the method comprising:

• forming a base dielectric layer on a substrate;
• forming first and second conductive structures in the base dielectric layer;
• disposing a first dielectric layer on the base dielectric layer and the first and second conductive structures;
• sequentially disposing second, third, and fourth dielectric layers, wherein at least two of the first, second, third, and fourth dielectric layers have non-uniform thickness and non-uniform surface flatness;
• forming first and second openings by etching the fourth dielectric layer using same preset etching rates in the first and second openings;
• etching the third and fourth dielectric layers in the first and second openings respectively using different preset etching rates in the first and second openings;
• etching the second and third dielectric layers in the first and second openings using same preset etching rates in the first and second openings;
• etching the first dielectric layer in the first opening and the second dielectric layer in the second opening using different etching rates in the first and second openings;
• etching the first dielectric layer in the first and second openings using same preset etching rates in the first and second openings to expose portions of the first and second conductive structures;
• and
• forming conductive material in the first and second openings and on the exposed portions of the first and second conductive structures to form lead wires.