Storage device and interface chip thereof

A storage device, comprising:

• a non-volatile (NV) memory for storing information, wherein the NV memory comprises a plurality of NV memory chips;
• a memory controller, for controlling operations of the storage device;
• and
• a plurality of interface chips, coupled between the memory controller and the NV memory, wherein any one interface chip of the plurality of interface chips comprises:
• a control circuit, for controlling operations of the interface chip;
• a slave interface circuit, for coupling the control circuit of the interface chip to the memory controller to make the interface chip play a role of slave of the memory controller within a hierarchical architecture in the storage device;
• and
• a master interface circuit, for coupling the control circuit of the interface chip to a set of NV memory chips among the plurality of NV memory chips to make the interface chip play a role of master of the set of NV memory chips within the hierarchical architecture which comprises the memory controller, the interface chip, and the set of NV memory chips;
• wherein the interface chip accesses the set of NV memory chips for the memory controller under the control of the control circuit, allowing the memory controller to access the NV memory through the interface chip in response to a host device command from a host device which is located outside of the storage device.