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US 10,505,711 B2Granted
Method of protecting a circuit against a side-channel analysis
AssigneeEshard
InventorsHugues Thiebeauld de La Crouee, Antoine Wurcker
Life of this patent
Estimating the term…
Abstract
In a general aspect, a method for executing a target operation combining a first input data with a second input data, and providing an output data can include generating at least two pairs of input words each comprising a first input word and a second input word and applying to each pair of input words a same derived operation providing an output word including a part of the output data resulting from the application of the target operation to first and second input data parts present in the pair of input words, and a binary one's complement of the output data part.
Claims26
A method for protecting a target operation executed by a circuit and generating an output data from a combination of first input data with a second input data, and providing an output data, the method comprising:
- generating, by the circuit:
- a first input word including a respective first input data part of a first input data and a first complemented input data part resulting from applying a Boolean NOT operation to the first input data part of the first input data,
- a second input word including a respective second input data part of the first input data and a second complemented input data part resulting from applying the Boolean NOT operation to the second input data part of the first input data,
- a third input word including a respective first input data part of a second input data and a third complemented input data part resulting from applying the Boolean NOT operation to the first input data part of the second input data, and
- a fourth input word including a respective second input data part of the second input data and a fourth complemented input data part resulting from applying the Boolean NOT operation to the second input data part of the second input data, the first input data parts of the first and second input data and second input data parts of the first and second input data being in a same positions respectively in the first, second, third and fourth input words, and the first, second, third and fourth complemented input data parts being in a same position respectively in the first, second, third and fourth input words;
- applying, by the circuit, a derived operation combining the first and third input words to obtain a first output word including:
- a first output data part of an output data, which is a result of a target operation applied to the first input data parts of the first and second input data, the output data being a result of the target operation applied to the first input data and the second input data, and
- a first complemented output data part resulting from applying the Boolean NOT operation to the first output data part;
- and
- applying, by the circuit, the derived operation to the second and fourth input words to obtain a second output word including:
- a second output data part of the output data, which is a result of the target operation applied to the second input data parts of the first and second input data, and
- a second complemented output data part resulting from applying the Boolean NOT operation to the second output data part.
9 more elements
A circuit including one or more processors, comprising:
- the one or more processors configured to:
- generate:
- a first input word including a respective first input data part of a first input data and a first complemented input data part resulting from applying a Boolean NOT operation to the first input data part of the first input data,
- a second input word including a respective second input data part of the first input data and a second complemented input data part resulting from applying the Boolean NOT operation to the second input data part of the first input data,
- a third input word including a respective first input data part of a second input data and a third complemented input data part resulting from applying the Boolean NOT operation to the first input data part of the second input data, and
- a fourth input word including a respective second input data part of the second input data and a fourth complemented input data part resulting from applying the Boolean NOT operation to the second input data part of the second input data, the first input data parts of the first and second input data and the second input data parts of the first and second input data being in a same position respectively in the first, second, third and fourth input words, and the first, second, third and fourth complemented input data parts being in a same position respectively in the first, second, third and fourth input words;
- apply a derived operation combining the first and third input words to obtain a first output word including:
- a first output data part of an output data, which is a result of a target operation applied to the first input data parts of the first and second input data, the output data being a result of the target operation applied to the first input data and the second input data, and
- a first complemented output data part resulting from applying the Boolean NOT operation to the first output data part;
- and
- apply the derived operation to the second and fourth input words to obtain a second output word including:
- a second output data part of the output data, which is a result of the target operation applied to the second input data parts of the first and the second input data, and
- a second complemented output data part resulting from applying the Boolean NOT operation to the second output data part.
10 more elements
A device, comprising:
- a circuit configured to:
- generate:
- a first input word including a respective first input data part of a first input data and a first complemented input data part resulting from applying a Boolean NOT operation to the first input data part of the first input data,
- a second input word including a respective second input data part of the first input data and a second complemented input data part resulting from applying the Boolean NOT operation to the second input data part of the first input data,
- a third input word including a respective first input data part of a second input data and a third complemented input data part resulting from applying the Boolean NOT operation to the first input data part of the second input data, and
- a fourth input word including a respective second input data part of the second input data and a fourth complemented input data part resulting from applying the Boolean NOT operation to the second input data part of the second input data, the first input data parts of the first and second input data and the second input data parts of the first and second input data being in a same position respectively in the first, second, third and fourth input words, and the respective first, second, third and fourth complemented input data parts being in a same position respectively in the first, second, third and fourth input words;
- apply a derived operation combining the first and third input words to obtain a first output word including:
- a first output data part of an output data, which is a result of a target operation applied to the first input data parts of the first and second input data, the output data being a result of the target operation applied to the first input data and the second input data, and
- a first complemented output data part resulting from applying the Boolean NOT operation applied to the first output data part;
- and
- apply the derived operation to the second and fourth input words to obtain a second output word including:
- a second output data part of the output data, which is a result of the target operation applied to the second input data parts of the first and second input data, and
- a second complemented output data part resulting from applying the Boolean NOT operation to the second output data part.
10 more elements
A non-transitory computer-readable medium carrying one or more sequences of instructions, which when executed by one or more processors, cause the one or more processors to:
- generate:
- a first input word including a respective first input data part of a first input data and a first input complemented data part resulting from applying a Boolean NOT operation to the first input data part of the first input data,
- a second input word including a respective second input data part of the first input data and a second complemented input data part resulting from applying the Boolean NOT operation to the second input data part of the first input data,
- a third input word including a respective first input data part of a second input data and a third complemented input data part resulting from applying the Boolean NOT operation to the first input data part of the second input data, and
- a fourth input word including a respective second input data part of the second input data and a fourth complemented input data part resulting from applying the Boolean NOT operation to the second input data part of the second input data, the first input data parts of the first and second input data and second input data parts of the first and second input data being in a same position respectively in the first, second, third and fourth input words, and the first, second, third and fourth complemented input data parts being in a same position respectively in the first, second, third and fourth input words;
- apply a derived operation combining the first and third input words to obtain a first output word including:
- a first output data part of an output data, which is a result of a target operation applied to the first input data parts of the first and second input data, the output data being a result of the target operation applied to the first input data and the second input data, and
- a first complemented output data part resulting from applying the Boolean NOT operation applied to the first output data part;
- and
- apply the derived operation to the second and fourth input words to obtain a second output word including:
- a second output data part of the output data, which is a result of the target operation applied to the second input data parts of the first and second input data, and
- a second complemented output data part resulting from applying the Boolean NOT operation to the second output data part.
9 more elements
Dependencies are inferred from the claim text.