Integration of silicon thin-film transistors and metal-oxide thin film transistors

An apparatus, comprising:

• a first transistor comprising a silicon active layer, wherein the silicon active layer comprises a first source region, a first drain region, and a first channel region formed between the first source region and the first drain region;
• and
• a second transistor comprising a metal oxide active layer, wherein the metal oxide active layer comprises a second source region, a second drain region, and a second channel region formed between the second source region and the second channel region,
• wherein the first transistor and the second transistor are stacked;
• and
• wherein either the first source region or the first drain region serves as a bottom gate for the second transistor, or
• wherein either the second source region or the second drain region serves as a top gate for the first transistor.