Array substrate, method for manufacturing array substrate, and display panel

A display panel, comprising:

• an array substrate and a counter substrate opposite to each other, wherein the array substrate comprises:
• a first flexible substrate comprising a foldable region;
• a plurality of gate lines and a plurality of data lines intersecting with each other located on a surface of the first flexible substrate;
• and
• display pixels located in regions defined by the plurality of gate lines and the plurality of data lines, each comprising a pixel circuit, a pixel electrode electrically connected to the pixel circuit, and a light emitting unit located on a side of the pixel electrode facing away from the first flexible substrate, the light emitting unit being electrically connected to the pixel electrode, wherein
• at least in the foldable region,
• the pixel electrode and a drain of a thin film transistor of the pixel circuit are arranged on a same layer;
• or
• the pixel electrode and a gate of the thin film transistor of the pixel circuit are arranged on a same layer;
• or
• the pixel electrode and an active layer of the thin film transistor of the pixel circuit are arranged on a same layer.

A method for manufacturing an array substrate, comprising:

• providing a first flexible substrate, wherein the first flexible substrate comprises a foldable region;
• and
• forming a plurality of gate lines and a plurality of data lines intersecting with each other on a surface of the first flexible substrate and forming display pixels in regions defined by the plurality of gate lines and the plurality of data lines, wherein each of the display pixels comprises a pixel circuit, a pixel electrode electrically connected to the pixel circuit, and a light emitting unit located on a side of the pixel electrode facing away from the first flexible substrate, and the light emitting unit is electrically connected to the pixel electrode, wherein
• at least in the foldable region,
• the pixel electrode and a drain of a thin film transistor of the pixel circuit are arranged on a same layer;
• or
• the pixel electrode and a gate of the thin film transistor of the pixel circuit are arranged on a same layer;
• or
• the pixel electrode and an active layer of the thin film transistor of the pixel circuit are arranged on a same layer.