Substrate processing method and device manufactured using the same
AssigneeASM IP Holding B.V.
InventorsTae Hee Yoo, Yoon Ki Min, Yong Min Yoo
Life of this patent
Estimating the term…
Abstract
A substrate processing method includes stacking a plurality of stack structures each including an insulating layer and a sacrificial layer, on one another. The method also includes generating a stair structure by etching the stack structures and generating a separation layer on a side surface of the stair structure. The method further includes removing the sacrificial layer and generating conductive word line structures in spaces from which the sacrificial layer is removed. The separation layer is provided between the conductive word line structures.
Claims15
A substrate processing method comprising:
- stacking a plurality of stack structures each comprising an insulating layer and a sacrificial layer formed over the insulating layer;
- generating a stair structure by partially removing the stack structures, the stair structure comprising a plurality of side surfaces;
- generating a separation layer on each of the plurality of side surfaces of the stair structure;
- and
- replacing the sacrificial layer of each stack structure with one of a plurality of conductive word line structures,
- wherein the separation layer is provided between adjacent ones of the conductive word line structures,
- wherein the conductive word line structure comprises a first conductive layer extending toward a channel and a second conductive layer on the first conductive layer, and
- wherein at least a part of a side surface of the first conductive layer is in contact with the separation layer.
A substrate processing method comprising:
- stacking a plurality of stack structures each comprising an insulating layer and a sacrificial layer formed over the insulating layer;
- generating a stair structure by partially removing the stack structures, the stair structure comprising a plurality of side surfaces;
- generating a separation layer on each of the plurality of side surfaces of the stair structure;
- replacing the sacrificial layer of each stack structure with one of a plurality of conductive word line structures, wherein the separation layer is provided between adjacent ones of the conductive word line structures;
- generating a pad layer on the sacrificial layer;
- and
- generating an interlayer insulating layer on the stair structure,
- wherein replacing the sacrificial layer comprises:
- removing the sacrificial layer and the pad layer;
- and
- filling a conductive material in a space from which the sacrificial layer and the pad layer are removed.
A semiconductor device comprising:
- a substrate;
- at least one memory cell string protruding and extending in an upward direction from the substrate;
- a first word line formed over the substrate and connected to a first memory cell of the memory cell string;
- a second word line formed over the first word line and connected to a second memory cell of the memory cell string;
- an insulating layer interposed between the first word line and the second word line, the insulating layer comprising a plurality of side surfaces;
- and
- a separation layer disposed on each of the plurality of the side surfaces of the insulating layer,
- wherein each of the first and second word lines comprises:
- a first conductive layer extending toward a channel;
- and
- a second conductive layer provided on the first conductive layer,
- wherein at least a part of a side surface of the first conductive layer of the second word line is in contact with the separation layer, and
- wherein the second conductive layer comprises a first protrusion protruding from the first conductive layer in a horizontal direction.
Dependencies are inferred from the claim text.