Semiconductor package

A semiconductor package, comprising:

• a support member having a first surface and a second surface opposing each other, and having a first through-hole and a second through-hole;
• a first metal layer disposed on at least an internal sidewall of the second through-hole and the first surface and the second surface of the support member;
• a connection member disposed on the first surface of the support member, and having a redistribution layer;
• a semiconductor chip disposed in the first through-hole, and having a connection pad connected to the redistribution layer;
• at least one passive component disposed in the second through-hole, and having a connection terminal connected to the redistribution layer;
• an encapsulant sealing the semiconductor chip and the at least one passive component, and covering the second surface of the support member;
• a second metal layer disposed on the encapsulant;
• a connecting trench via passing through the encapsulant to connect the first metal layer to the second metal layer, and surrounding the first through-hole and the second through-hole in a plan view perpendicular to a thickness direction of the support member;
• and
• a reinforcing via disposed in at least a portion of a region, overlapping the connecting trench via, of the support member, and connected to the first metal layer.