Method for building up a fan-out RDL structure with fine pitch line-width and line-spacing
AssigneeSTATS ChipPAC Pte. Ltd.
InventorYaojian Lin
Life of this patent
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AssigneeSTATS ChipPAC Pte. Ltd.
InventorYaojian Lin
Estimating the term…
A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first insulating layer is formed over a first surface of the encapsulant and an active surface of the semiconductor die. A second insulating layer is formed over a second surface of the encapsulant opposite the first surface. A conductive layer is formed over the first insulating layer. The conductive layer includes a line-pitch or line-spacing of less than 5 μm. The active surface of the semiconductor die is recessed within the encapsulant. A third insulating layer is formed over the semiconductor die including a surface of the third insulating layer coplanar with a surface of the encapsulant. The second insulating layer is formed prior to forming the conductive layer. A trench is formed in the first insulating layer. The conductive layer is formed within the trench.
A semiconductor device, comprising:
A semiconductor device, comprising:
A semiconductor device, comprising:
A semiconductor device, comprising:
Dependencies are inferred from the claim text.