Fan-out semiconductor package

A fan-out semiconductor package comprising:

• a frame including a plurality of insulating layers, a plurality of wiring layers disposed on the plurality of insulating layers, and a plurality of connection via layers penetrating through the plurality of insulating layers and electrically connecting the plurality of wiring layers to each other, and having a recess portion and a stopper layer disposed on a bottom surface of the recess portion;
• a semiconductor chip including a body having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface and a passivation layer disposed on the active surface and having openings exposing at least portions of the connection pads, and disposed in the recess portion so that the inactive surface is connected to the stopper layer;
• a resin layer disposed on the active surface of the semiconductor chip;
• an encapsulant covering at least portions of side surfaces of each of the semiconductor chip and the resin layer and filling at least portions of the recess portion;
• a first redistribution layer disposed on the resin layer and the encapsulant;
• first redistribution vias penetrating through the resin layer to fill via holes in the resin layer exposing at least portions of the connection pads and electrically connecting the connection pads and the first redistribution layer to each other;
• and
• a connection member disposed on the resin layer and the encapsulant and including one or more second redistribution layers electrically connected to the first redistribution layer,
• wherein the connection pads are electrically connected to the plurality of wiring layers.