Power semiconductor device with small contact footprint and the preparation method

A power semiconductor device comprising:

• a die paddle;
• a first semiconductor chip attached to a front side of the die paddle;
• a second semiconductor chip attached to a back side of the die paddle;
• one or more first conductive pads attached to a top surface of the first semiconductor chip;
• one or more second conductive pads attached to a top surface of the second semiconductor chip;
• and
• a plastic package body covering the first semiconductor chip, the second semiconductor chip, the die paddle, the one or more first conductive pads and the one or more second conductive pads;
• wherein at least a side surface of a first selected conductive pad of the one or more first conductive pads and a side surface of a second selected conductive pad of the one or more second conductive pads are exposed from a side surface of the plastic package body;
• wherein the one or more first conductive pads include an L-shaped conductive pad and a corner conductive pad;
• wherein the L-shaped conductive pad is thicker than the corner conductive pad;
• wherein the L-shaped conductive pad has a notch formed at one corner;
• wherein the corner conductive pad is arranged inside the notch;
• wherein a top surface of the L-shaped conductive pad is exposed from a top surface of the plastic package body;
• wherein an L-shaped heat sink having a size and a shape similar to the L-shaped conductive pad is aligned with and attached to the top surface of the L-shaped conductive pad;
• wherein an extension part of the L-shaped heat sink is perpendicular to and extends from a side edge of the L-shaped heat sink;
• and
• wherein the side edge of the L-shaped heat sink is flush with the side surface of the plastic package body.

A power semiconductor device comprising:

• a die paddle;
• a first semiconductor chip attached to a front side of the die paddle;
• a second semiconductor chip attached to a back side of the die paddle;
• one or more first conductive pads attached to a top surface of the first semiconductor chip;
• one or more second conductive pads attached to a top surface of the second semiconductor chip;
• and
• a plastic package body covering the first semiconductor chip, the second semiconductor chip, the die paddle, the one or more first conductive pads and the one or more second conductive pads;
• wherein at least a side surface of a first selected conductive pad of the one or more first conductive pads and a side surface of a second selected conductive pad of the one or more second conductive pads are exposed from a side surface of the plastic package body;
• wherein the one or more second conductive pads include an L-shaped conductive pad and a corner conductive pad;
• wherein the L-shaped conductive pad is thicker than the corner conductive pad;
• wherein the L-shaped conductive pad has a notch formed at one corner;
• wherein the corner conductive pad is arranged inside the notch;
• wherein a top surface of the L-shaped conductive pad is exposed from a bottom surface of the plastic package body;
• wherein an L-shaped heat sink having a size and a shape similar to the L-shaped conductive pad is aligned with and attached to the top surface of the L-shaped conductive pad;
• wherein an extension part of the L-shaped heat sink is perpendicular to and extends from a side edge of the L-shaped heat sink;
• and
• wherein the side edge of the L-shaped heat sink is flush with the side surface of the plastic package body.

A power semiconductor device comprising:

• a die paddle;
• a first semiconductor chip attached to a front side of the die paddle;
• a second semiconductor chip attached to a back side of the die paddle;
• one or more first conductive pads attached to a top surface of the first semiconductor chip;
• one or more second conductive pads attached to a top surface of the second semiconductor chip;
• and
• a plastic package body covering the first semiconductor chip, the second semiconductor chip, the die paddle, the one or more first conductive pads and the one or more second conductive pads;
• wherein at least a side surface of a first selected conductive pad of the one or more first conductive pads and a side surface of a second selected conductive pad of the one or more second conductive pads are exposed from a side surface of the plastic package body;
• wherein the side surface of the plastic package body is perpendicular to the top surface of the first semiconductor chip;
• wherein a top surface of the first selected conductive pad of the one or more first conductive pads is exposed from a top surface of the plastic package body;
• and
• wherein a top surface of the second selected conductive pad of the one or more second conductive pads is exposed from a bottom surface of the plastic package body.