Distinct gate stacks for III-V-based CMOS circuits comprising a channel cap

A method for forming a plurality of semiconductor devices, comprising:

• forming first source and drain regions by implanting a region of a continuous semiconductor substrate formed from a group IV semiconductor material to define a first channel region in the continuous semiconductor substrate between the first source and drain regions;
• forming a region of second semiconductor material embedded in the continuous semiconductor substrate, comprising second source and drain regions and a second channel region between the second source and drain regions, wherein the second channel region is coplanar with the first channel region by forming a trench in the continuous semiconductor substrate and epitaxially growing a group III-V semiconductor material in the trench;
• forming a mask on the continuous semiconductor substrate, wherein the mask has an opening aligned with each of the first channel region and the second channel region;
• forming a silicon cap within the openings on each of the first channel region and the second channel region by gas cluster ion beam deposition;
• forming a hafnium dioxide gate dielectric layer over the silicon caps;
• activating the hafnium dioxide gate dielectric layer using ozone;
• forming a nitrogen-containing layer on the hafnium dioxide gate dielectric layer;
• forming an aluminum oxide layer on the nitrogen-containing layer;
• and
• forming a gate metal on the aluminum oxide layer.

A method for forming a plurality of semiconductor devices, comprising:

• forming first source and drain regions by implanting a region of a continuous semiconductor substrate formed from a group IV semiconductor material to define a first channel region in the continuous semiconductor substrate between the first source and drain regions;
• forming a region of second semiconductor material embedded in the continuous semiconductor substrate, comprising second source and drain regions and a second channel region between the second source and drain regions, wherein the second channel region is coplanar with the first channel region by forming a trench in the continuous semiconductor substrate and epitaxially growing a group III-V semiconductor material in the trench;
• depositing a mask layer over the continuous semiconductor substrate with openings directly over the first and second channel regions;
• forming a silicon cap on each of the first channel region and the second channel region within the openings of the mask layer by gas cluster ion beam deposition;
• forming a hafnium dioxide gate dielectric layer over the silicon caps;
• activating the hafnium dioxide gate dielectric layer using ozone;
• forming a nitrogen-containing layer on the hafnium dioxide gate dielectric layer;
• forming an aluminum oxide layer on the nitrogen containing layer;
• forming a gate metal on the aluminum oxide layer;
• and
• etching away the mask layer after forming the gate metal.