Gate cut in replacement metal gate process

A method of forming a semiconductor structure, comprising:

• forming a plurality of semiconductor fins over a semiconductor substrate;
• forming a gate dielectric layer over each of the fins;
• forming a first work function metal layer over the gate dielectric layer;
• forming a masking layer over the first work function metal layer;
• a first etching of the masking layer to form a plurality of recesses extending partially through the masking layer, a first recess of the plurality of recesses overlying the first work function metal layer between adjacent fins within a first device region of the substrate, and a second recess of the plurality of recesses overlying the first work function metal layer between adjacent fins within a second device region of the substrate;
• forming a first spacer layer over sidewalls of the plurality of recesses;
• a second etching of the masking layer using the first spacer layer as a first etch mask to form a first gate cut opening within the first device region and a second gate cut opening within the second device region, wherein the first gate cut opening extends partially through the masking layer and the second gate cut opening extending entirely through the masking layer exposing the first work function metal layer at a first bottom of the second gate cut opening;
• forming a second spacer layer over sidewalls of the first and second gate cut openings;
• a third etching of the masking layer using the second spacer layer as a second etch mask to expose the first work function metal layer at a first bottom of the first gate cut opening;
• etching the first work function metal layer from the first bottom of the first and second gate cut openings and etching the gate dielectric layer thereunder, thereby forming a second bottom of the first gate cut opening and a second bottom of the second gate cut opening;
• and
• depositing an isolation dielectric layer within the first and second gate cut openings.