Inductor structure for integrated circuit

A semiconductor device, comprising:

• a first substrate;
• a passivation layer disposed along a first side of the first substrate;
• one or more redistribution layers disposed within one or more dielectric structures and separated from the first side of the first substrate by the passivation layer;
• a first plurality of conductive interconnect layers within a first inter-level dielectric (ILD) structure along a second side of the first substrate opposing the first side;
• a through-substrate-via (TSV) extending through the first substrate and coupling the first plurality of conductive interconnect layers to the one or more redistribution layers;
• and
• wherein the one or more redistribution layers define at least a part of an inductor having one or more turns that wind around an axis extending parallel to a first surface of the first substrate facing one of the one or more dielectric structures.

An integrated circuit, comprising:

• a plurality of conductive routing layers comprising conductive wires and conductive vias disposed within one or more dielectric structures abutting a first substrate;
• wherein the plurality of conductive routing layers define an inductor having one or more turns respectively comprising a vertically extending segment arranged along a plane that intersects the first substrate;
• wherein the plurality of conductive routing layers comprise:
• a first plurality of conductive interconnect layers arranged within a first inter-level dielectric (ILD) structure comprising a plurality of stacked ILD layers on the first substrate;
• and
• a second ILD structure disposed between a second substrate and the first ILD structure and surrounding a second plurality of conductive interconnect layers, wherein the plurality of conductive routing layers further comprise the second plurality of conductive interconnect layers.