Method of manufacturing wafer level low melting temperature interconnections

A method of manufacturing a bonded wafer assembly with Indium interconnections comprising:

• a) providing a first wafer with a substrate layer, an insulating layer, and a metal seed layer, the metal seed layer connected to the substrate layer by vias extending through a first plurality of holes in the insulating layer;
• b) applying a photoresist (PR) pattern mold over the metal seed layer such that a second plurality of holes through the PR pattern mold align with the vias;
• c) plating Indium within the second plurality of holes in the PR pattern mold to form an array of Indium posts on the first wafer;
• d) stripping the PR pattern mold;
• e) etching a portion of the metal seed layer to singulate the array of Indium posts;
• f) applying an oxide layer, at a temperature below 150 degrees Celsius, over a surface of the first wafer;
• g) applying chemical-mechanical polishing (CMP) to form a planar surface, the planar surface including the array of Indium posts and the oxide layer;
• h) performing steps a)-g) to create a second wafer;
• i) aligning the Indium posts of the first and second wafers;
• and
• j) bonding the first wafer and the second wafer together to form the bonded wafer assembly.

A method of manufacturing an array of planar wafer level metal posts comprising:

• plating an array of posts within a photoresist (PR) pattern mold on a substrate of a first wafer;
• stripping the PR pattern mold from the substrate and array of posts;
• after the step of stripping the PR pattern mold, applying a PR layer around each of the posts;
• applying an oxide layer, at a temperature of below 150 degrees Celsius, over a surface of the first wafer and around the array of posts extending from the surface;
• applying chemical-mechanical polishing (CMP) to planarize the oxide layer and the array of posts;
• and
• after the step of applying CMP, protecting exposed surfaces of the array of posts with a second PR layer.