Shift register unit, driving method thereof, gate driving circuit and display device

A shift register unit, comprising:

• an input circuit connected to a signal input end, a first voltage end and a pull-up node;
• a resetting circuit connected to a resetting end, a second voltage end and the pull-up node;
• a pull-down node control circuit connected to the pull-up node, a pull-down node, the first voltage end and a third voltage end;
• a storage circuit, a first end of the storage circuit is connected to the pull-up node, and a second end of the storage circuit is connected to a gate driving signal output end;
• a gate driving signal output circuit connected to the pull-up node, the pull-down node, the gate driving signal output end, a clock signal input end and the third voltage end;
• and
• a pull-up node potential maintenance circuit connected to the gate driving signal output end and the pull-up node and configured to maintain a potential at the pull-up node to be a high level when the gate driving signal output end outputs a gate driving signal at a high level,
• wherein the pull-up node potential maintenance circuit comprises a potential maintenance transistor, a gate electrode of the potential maintenance transistor is connected to the gate driving signal output end, a first electrode of the potential maintenance transistor is connected to the clock signal input end or the first voltage end, and a second electrode of the potential maintenance transistor is connected to the pull-up node.