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US 10,504,593 B2Granted
Method, system and device for non-volatile memory device operation with low power, high speed and high density
AssigneeArm Limited
InventorGlen Arnold Rosendale
Life of this patent
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Abstract
Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a read operation or a particular write operation may be performed on a correlated electron switch (CES) device by coupling a terminal of the CES device to a particular node through any one of multiple different resistive paths.
Claims17
A device comprising:
- a first non-volatile memory element comprising a first terminal coupled to a first node and a second terminal;
- and
- one or more first conductive elements to selectively couple the second terminal of the first non-volatile element to a second node through a first selected resistive path so as to apply at least a first voltage between the first and second terminals in a read operation, and selectively couple the second terminal of the first non-volatile memory element to the second node through one or more second selected resistive paths so as to apply at least a second voltage between the first and second terminals in a write operation,
- wherein at least a first of the one or more second selected resistive paths to apply a first programming signal between the first and second terminals of the first non-volatile memory element to place the first non-volatile memory element in a first impedance state, and a least a second of the one or more second selected resistive paths to apply a second programming signal between the first and second terminals of the first non-volatile memory element to place the first non-volatile memory element in a second impedance state, and
- wherein the first of the one or more second selected resistive paths to enable sufficient current density in the first non-volatile memory element on application of the first programming signal to equal or exceed a current density in the first non-volatile memory element on application of the second programming signal.
2 more elements
A method comprising:
- while a first terminal of a first non-volatile memory element is coupled to a first node, selectively coupling a second terminal of the first non-volatile memory element to a second node through one or more first selected resistive paths so as to apply at least a first voltage between the first and second terminals in a read operation;
- while the first terminal of the first non-volatile memory element is coupled to the first node, selectively coupling the second terminal of the first non-volatile memory element to the second node through a second selected resistive path so as to apply at least a second voltage between the first and second terminals in a first write operation to place the first non-volatile memory element in a first impedance state;
- and
- while the first terminal of the first non-volatile memory element is coupled to the first node, selectively coupling the second terminal of the first non-volatile memory element to the second node through one or more third selected resistive paths so as to apply at least a third voltage between the first and second terminals in a second write operation to place the first non-volatile memory element in a second impedance state,
- wherein the second of the one or more second selected resistive paths to enable sufficient current density in the first non-volatile memory element during the second write operation to equal or exceed a current density in the first non-volatile memory element during the first write operation.
2 more elements
Dependencies are inferred from the claim text.