Method and system for compensating for floating gate-to-floating gate (fg-fg) interference in flash memory cell read operations

A system, comprising:

• a display;
• a memory array having a plurality of memory cells;
• and
• a memory controller, comprising:
• memory controller logic to:
• receive a request to read data stored in a first memory cell of a non-volatile memory array, wherein the data includes at least 4 bits, wherein the first memory cell is in a first wordline;
• perform a read operation on a second memory cell of the non-volatile memory array to determine if the second memory cell is programmed to a first programming level that is between an erased programming level and at least 14 other programming levels, the second memory cell being adjacent to the first memory cell on a memory cell string, wherein the second memory cell is operated with a second wordline that is adjacent to the first wordline, in response to the request;
• assign a disturbed condition to the first memory cell responsive to a determination that the second memory cell is at the first programming level;
• and
• read the data stored in the first memory cell, in response to the request, with a compensated sensing parameter responsive to the association of the first memory cell with the disturbed condition;
• and
• error-correcting code logic to determine that the first memory cell is in the disturbed condition when the second memory cell is programmed to the first programming level.

A method, comprising:

• receiving a request to read data stored in a first memory cell of a non-volatile memory array, wherein the data includes at least 4 bits, wherein the first memory cell is in a first wordline;
• performing a read operation on a second memory cell of the non-volatile memory array, the second memory cell being adjacent to the first memory cell on a memory cell string, wherein the second memory cell is in a second wordline that is adjacent to the first wordline, in response to the request;
• determining whether the second memory cell is programmed to a first programming level that is between an erased programming level and at least 14 other programming levels;
• assigning a disturbed condition to the first memory cell, responsive to a determination that the second memory cell is at the first programming level;
• and
• reading the data stored in the first memory cell, in response to the request, with a compensated sensing parameter responsive to assignment of the disturbed condition to the first memory cell.